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PostPosted: Wed Mar 09, 2011 11:26 pm 
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Newbie

Joined: Mon Nov 08, 2010 6:49 am
Posts: 20
Hi,

I tried to compile 2.6.37.3 kernel but I failed.
I download the kernel from kernel.org and apply the 2.6.31 patch. I had to correct a few things (MPP*_GE1 changed their name, .phys_io and .io_pg_offst are not used anymore). Here is my new diff file:
Code:
diff -r -N ../linux-2.6.37.3/arch/arm/mach-kirkwood/Kconfig linux-2.6.37.3/arch/arm/mach-kirkwood/Kconfig
133,138d132
< config MACH_LSXHL
<    bool "Buffalo LS-XHL Series"
<    help
<      Say 'Y' here if you want your kernel to support the
<      Buffalo LS-XHL Series.
<
diff -r -N ../linux-2.6.37.3/arch/arm/mach-kirkwood/lsxhl-setup.c linux-2.6.37.3/arch/arm/mach-kirkwood/lsxhl-setup.c
1,284d0
< /*
<  * arch/arm/mach-kirkwood/lsxhl-setup.c
<  *
<  * Buffalo LS-XHL Series Setup
<  *
<  * This file is licensed under the terms of the GNU General Public
<  * License version 2.  This program is licensed "as is" without any
<  * warranty of any kind, whether express or implied.
<  */
<
< #include <linux/kernel.h>
< #include <linux/init.h>
< #include <linux/platform_device.h>
< #include <linux/mtd/nand.h>
< #include <linux/mtd/partitions.h>
< #include <linux/mv643xx_eth.h>
< #include <linux/ata_platform.h>
< #include <linux/gpio.h>
< #include <linux/leds.h>
< #include <linux/gpio_keys.h>
< #include <linux/input.h>
< #include <asm/mach-types.h>
< #include <asm/mach/arch.h>
< #include <mach/kirkwood.h>
< #include <mach/bridge-regs.h>
< #include <plat/mvsdio.h>
< #include <plat/orion_nand.h>
< #include "common.h"
< #include "mpp.h"
<
< /* for pm */
< #include <linux/io.h>
< #include <linux/delay.h>
< #include <asm/proc-fns.h>
< #include <mach/system.h>
< extern void setup_mm_for_reboot(char mode);
<
<
<
< #include <asm/io.h>
< #include <asm/gpio.h>
<
< extern void kirkwood_ge00_exit(void);
< extern void kirkwood_ge01_exit(void);
<
< static struct mv643xx_eth_platform_data lsxhl_ge00_data = {
<    .phy_addr   = MV643XX_ETH_PHY_ADDR(0),
< };
< static struct mv643xx_eth_platform_data lsxhl_ge01_data = {
<    .phy_addr   = MV643XX_ETH_PHY_ADDR(8),
< };
<
<
< static unsigned int lsxhl_mpp_config[] __initdata = {
<    MPP0_SPI_SCn,
<         MPP1_SPI_MOSI,
<         MPP2_SPI_SCK,
<         MPP3_SPI_MISO,
<         MPP4_UART0_RXD,
<         MPP5_UART0_TXD,
<         MPP6_SYSRST_OUTn,
<         MPP7_GPO,
<         MPP8_GPIO,
<         MPP9_GPIO,
<         MPP10_GPO,    /* HDD Power */
<         MPP11_GPIO,   /* USB VBUS EN */
<         MPP12_SD_CLK,
<         MPP13_SD_CMD,
<         MPP14_SD_D0,
<         MPP15_SD_D1,
<         MPP16_SD_D2,
<         MPP17_SD_D3,
<         MPP18_GPO,    /* FAN HIGH: on:0, off:1 */
<         MPP19_GPO,    /* FAN LOW: on:0, off:1 */
<         MPP20_GE1_TXD0,
<         MPP21_GE1_TXD1,
<         MPP22_GE1_TXD2,
<         MPP23_GE1_TXD3,
<         MPP24_GE1_RXD0,
<         MPP25_GE1_RXD1,
<         MPP26_GE1_RXD2,
<         MPP27_GE1_RXD3,
<         MPP28_GPIO,
<         MPP29_GPIO,
<         MPP30_GE1_RXCTL,
<         MPP31_GE1_RXCLK,
<         MPP32_GE1_TCLKOUT,
<         MPP33_GE1_TXCTL,
<         MPP34_GPIO,
<         MPP35_GPIO,
<         MPP36_GPIO, /* FUNC LED */
<         MPP37_GPIO, /* ALARM LED */
<         MPP38_GPIO, /* INFO LED */
<         MPP39_GPIO, /* POWER LED */
<         MPP40_GPIO, /* FAN LOCK */
<         MPP41_GPIO, /* FUNC SW */
<         MPP42_GPIO, /* POWER SW */
<         MPP43_GPIO, /* POWER AUTO SW */
<         MPP44_GPIO,
<         MPP45_GPIO,
<         MPP46_GPIO,
<         MPP47_GPIO,
<         MPP48_GPIO, /* FUNC RED LED */
<         MPP49_GPIO, /* UART EN */
<    0
< };
<
< static struct mv_sata_platform_data lsxhl_sata_data = {
<         .n_ports        = 1,
< };
<
< static struct gpio_led lsxhl_led_pins[] = {
<         {
<                 .name                   = "func",
<                 .gpio                   = 36,
<                 .active_low             = 1,
<         },
<         {
<                 .name                   = "alarm",
<                 .gpio                   = 37,
<                 .active_low             = 1,
<         },
<         {
<                 .name                   = "info",
<                 .gpio                   = 38,
<                 .active_low             = 1,
<         },
<         {
<                 .name                   = "power",
<                 .gpio                   = 39,
<                 .default_trigger        = "default-on",
<                 .active_low             = 1,
<         },
<         {
<                 .name                   = "func2",
<                 .gpio                   = 48,
<                 .active_low             = 1,
<         },
< };
<
< static struct gpio_led_platform_data lsxhl_led_data = {
<         .leds           = lsxhl_led_pins,
<         .num_leds       = ARRAY_SIZE(lsxhl_led_pins),
< };
<
< static struct platform_device lsxhl_leds = {
<         .name   = "leds-gpio",
<         .id     = -1,
<         .dev    = {
<                 .platform_data  = &lsxhl_led_data,
<         }
< };
<
< #if 0 /* power save in power-off mode. */
< static void lsxhl_power_off(void)
< {
<     int i=0;
<
< /* PCI Express Power Saving: NG
<     writel(0x20800087, (PCIE_VIRT_BASE | 0x1b00));
< */
<
< /* Ethernet Power Saving */
< #define GE00_VIRT_BASE          (KIRKWOOD_REGS_VIRT_BASE | 0x70000)
< #define GE01_VIRT_BASE          (KIRKWOOD_REGS_VIRT_BASE | 0x74000)
<     writel(0xff00, (GE00_VIRT_BASE | 0x2680));
<     writel(0xff00, (GE01_VIRT_BASE | 0x2680));
<     writel(readl(GE00_VIRT_BASE | 0x243c) & ~0x400, GE00_VIRT_BASE | 0x243c);
<     writel(readl(GE01_VIRT_BASE | 0x243c) & ~0x400, GE01_VIRT_BASE | 0x243c);
<     writel(readl(GE00_VIRT_BASE | 0x243c) & ~0x1, GE00_VIRT_BASE | 0x243c);
<     writel(readl(GE01_VIRT_BASE | 0x243c) & ~0x1, GE01_VIRT_BASE | 0x243c);
<
< /* NG:
<     kirkwood_clock_gate(CGC_GE0 | CGC_USB0 | CGC_NAND_SPI |
<                         CGC_XOR0 | CGC_SATA0 | CGC_XOR1 |
<                         CGC_CRYPTO | CGC_GE1);
< */
< /* OK: maybe
<     kirkwood_clock_gate(CGC_GE0 | CGC_USB0 |
<                         CGC_XOR0 | CGC_SATA0 | CGC_XOR1 |
<                         CGC_CRYPTO | CGC_GE1);
< */
<
< /* Memory Power Management */
<     writel(0x2bff, (BRIDGE_VIRT_BASE | 0x118));
<
<     gpio_direction_output(18, 1); // Fan high off
<     gpio_direction_output(19, 1); // Fan low off
<     gpio_direction_output(11, 0); // USB Power off
<     gpio_direction_output(10, 0); // HDD Power off
<
<     gpio_direction_output(36, 1); // Func LED off
<     gpio_direction_output(37, 1); // Alarm LED off
<     gpio_direction_output(38, 1); // Info LED off
<     gpio_direction_output(39, 1); // Power LED off
<     gpio_direction_output(48, 1); // Func2 LED off
<
<     cpu_proc_fin();
<
<     local_irq_disable();
<     
<     /* disable interrupts to CPU
<     writel(readl(CPU_CONTROL) | (1 << 28), CPU_CONTROL);
<     */
<
< /* Mbus-L to Mbus Bridge Interrupt Mask Register */
<     writel(BRIDGE_INT_TIMER1, BRIDGE_MASK);
< /* Main IRQ Interrupt Mask Low Register */
<     writel(2, IRQ_VIRT_BASE | 0x04);
< /* Main FIQ Interrupt Mask Low Register */
<     writel(0, IRQ_VIRT_BASE | 0x08);
< /* Endpoint Interrupt Mask Low Register */
<     writel(2, IRQ_VIRT_BASE | 0x0c);
< /* Main IRQ Interrupt Mask High Register */
<     writel(0, IRQ_VIRT_BASE | 0x14);
< /* Main FIQ Interrupt Mask High Register */
<     writel(0, IRQ_VIRT_BASE | 0x18);
< /* Endpoint Interrupt Mask High Register */
<     writel(0, IRQ_VIRT_BASE | 0x1c);
< /* CPU Timer1 Reload Register */
<     writel(20000000, TIMER_VIRT_BASE | 0x18);
< /* CPU Timers Control Register */
<     writel(readl(TIMER_VIRT_BASE) | 12, TIMER_VIRT_BASE);
<
< /* GotoPowerSave */
<     writel((readl(CLOCK_GATING_CTRL) | (1 << 11)) & ~(1 << 12),
<            CLOCK_GATING_CTRL);
<
< /*  SDRAM Power Saving */
<     writel(0x7, DDR_OPERATION_BASE);
<     while(1){
<         arch_idle();
<         gpio_direction_output(38, (i++) % 25 != 0);
<         if(!gpio_get_value(42) || !gpio_get_value(43)) break;
< /* Mbus-L to Mbus Bridge Interrupt Cause Register */
<         writel(0, BRIDGE_CAUSE);
<     }
<     local_irq_enable();
<
<     setup_mm_for_reboot('h');
<     arch_reset('h', NULL);
<     mdelay(1000);
<     printk("reset failed: system halted\n");
<     while(1);
< }
< #endif
<
< static void __init lsxhl_init(void)
< {
<    /*
<     * Basic setup. Needs to be called early.
<     */
<    kirkwood_init();
<    kirkwood_mpp_conf(lsxhl_mpp_config);
<
<    kirkwood_uart0_init();
<
<         if (gpio_request(11, "USB Power Enable") != 0 ||
<             gpio_direction_output(11, 1) != 0)
<                 printk(KERN_ERR "can't set up GPIO 11 (USB Power Enable)\n");
<         kirkwood_ehci_init();
<
<
<    kirkwood_ge00_init(&lsxhl_ge00_data);
<    kirkwood_ge01_init(&lsxhl_ge01_data);
<
<         kirkwood_sata_init(&lsxhl_sata_data);
<
<         kirkwood_spi_init();
<
<         platform_device_register(&lsxhl_leds);
<
< #if 0 /* power save in power-off mode. */
<         pm_power_off = lsxhl_power_off;
< #endif
< }
<
< MACHINE_START(LSXHL, "Buffalo LS-XHL Series")
<    .boot_params   = 0x00000100,
<    .init_machine   = lsxhl_init,
<    .map_io      = kirkwood_map_io,
<    .init_irq   = kirkwood_init_irq,
<    .timer      = &kirkwood_timer,
< MACHINE_END
diff -r -N ../linux-2.6.37.3/arch/arm/mach-kirkwood/Makefile linux-2.6.37.3/arch/arm/mach-kirkwood/Makefile
14d13
< obj-$(CONFIG_MACH_LSXHL)      += lsxhl-setup.o
diff -r -N ../linux-2.6.37.3/arch/arm/tools/mach-types linux-2.6.37.3/arch/arm/tools/mach-types
543c543
< pxa_mpm10      MACH_PXA_MPM10      PXA_MPM10      2663
---
> pxa_mpm10      MACH_PXA_MPM10      PXA_MPM10      527
2650c2650
< lsxhl         MACH_LSXHL      LSXHL         527
---
> lsxhl         MACH_LSXHL      LSXHL         2663


It compile without any warning but when I reboot: the HDD read during 5 to 10 seconds, the light stop blinking (due to lsmonitor) so I guess the kernel is loaded but after 15 to 20 seconds the HDD stops and the NAS is unaccessible and I can't power it off using the switch.

I download 2.6.34 and compare other machine located in mach-kirkwood. The things that changed are:
- .phys_io and .io_pg_offst references have been removed
- in ts41x file, MPP have been changed just like I did
- in ts41x
Code:
 if (machine_is_ts41x())
               kirkwood_pcie_init();

Has been changed by
Code:
       if (machine_is_ts41x()) {
               /*
                * Without this explicit reset, the PCIe SATA controller
                * (Marvell 88sx7042/sata_mv) is known to stop working
                * after a few minutes.
                */
               orion_pcie_reset((void __iomem *)PCIE_VIRT_BASE);

               kirkwood_pcie_init(KW_PCIE0);
       }


So do we need to add orion_pcie_reset((void __iomem *)PCIE_VIRT_BASE); kirkwood_pcie_init(); because kirkwood_pcie_init(); wasn't present is the original patch ?


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PostPosted: Thu Mar 10, 2011 6:53 am 
Offline
Moderator

Joined: Mon Apr 26, 2010 10:24 am
Posts: 2691
Evtl. hat kenatonline Zeit für dich. Bis dahin könntest du seinen Kernel testen:
http://downloads.buffalo.nas-central.org/Users/kenatonline/Kernel-2.6.31.8/


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